PIC18F6585 Datasheet, PDF (12/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
FIGURE 1-1:
PIC18F6X8X BLOCK DIAGRAM
Data Bus<8>
21 ^{Table Pointer<21>}
8
8
21
inc/dec logic
Data Latch
Data RAM
(3328 bytes)
21
Address Latch
Program Memory
(48 Kbytes)
Data Latch
PCLATU PCLATH
PCU PCH PCL
Program Counter
31 Level Stack
Address Latch
12
Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Bank0, F
12
Table Latch
Decode
inc/dec
logic
16
8
ROM Latch
Instruction
Decode &
Control
OSC2/CLKO/RA6
OSC1/CLKI
Timing
Generation
Precision
Band Gap
Reference
IR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Test Mode
Select
8
PRODH PRODL
3
BITOP
8
8 x 8 Multiply
8
W
8
8
8
ALU<8>
8
RG5/ VDD, VSS
MCLR
BOR
LVD
Timer0
Timer1
Timer2
Timer3
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/LVDIN
OSC2/CLKO/RA6
RB2/INT2:RB0/INT0
RB3/INT3
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2⁽¹⁾
RC2/CCP1/P1A
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RD7/PSP7:RD0/PSP0
RE0/RD
RE1/WR
RE2/CS
RE3
RE4
RE5/P1C
RE6/P1B
RE7/CCP2⁽¹⁾
RF0/AN5
RF1/AN6/C2OUT
RF2/AN7/C1OUT
RF3/AN8/C2IN+
RF4/AN9/C2IN-
RF5/AN10/C1IN+/CVREF
RF6/AN11/C1IN-
RF7/SS
PORTG
RG0/CANTX1
RG1/CANTX2
RG2/CANRX
RG3
RG4/P1D
RG5/MCLR/VPP
Comparator ECCP1
CCP2
AUSART
ECAN Module
Synchronous
Serial Port
10-bit
ADC
Note 1: The CCP2 pin placement depends on the CCP2MX and Processor mode settings.
Data EEPROM
DS30491C-page 10
 2004 Microchip Technology Inc.