PIC18F6585 Datasheet, PDF (487/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
SPI Mode (Slave Mode with
CKE = 1) ........................................................... 196
Stop Condition Receive or
Transmit Mode .................................................. 222
Synchronous Reception
(Master Mode, SREN) ...................................... 246
Synchronous Transmission....................................... 244
Synchronous Transmission
(Through TXEN) ............................................... 245
Time-out Sequence on POR w/PLL
Enabled (MCLR Tied to VDD
via 1 kΩ Resistor) ............................................... 50
Time-out Sequence on Power-up
(MCLR Not Tied to VDD)
Case 1 ................................................................ 49
Case 2 ................................................................ 49
Time-out Sequence on Power-up
(MCLR Tied to VDD
via 1 kΩ Resistor) ............................................... 49
Timer0 and Timer1 External Clock ........................... 433
Transition Between Timer1 and OSC1
(EC with PLL Active, SCS1 = 1) ......................... 29
Transition Between Timer1 and OSC1
(HS with PLL Active, SCS1 = 1) ......................... 29
Transition Between Timer1 and OSC1
(HS, XT, LP) ....................................................... 28
Transition Between Timer1 and
OSC1 (RC, EC) .................................................. 30
Transition from OSC1 to
Timer1 Oscillator................................................. 28
USART Synchronous Receive
(Master/Slave) .................................................. 445
USART Synchronous Transmission
(Master/Slave) .................................................. 445
Wake-up from Sleep via Interrupt ............................. 358
TRISE Register
PSPMODE Bit................................................... 133, 152
TSTFSZ ............................................................................ 405
Two-Word Instructions
Example Cases........................................................... 58
TXSTA Register
BRGH Bit .................................................................. 233
U
USART
Asynchronous Mode ................................................. 237
12-bit Break Transmit and
Receive..................................................... 243
Associated Registers, Receive ......................... 241
Associated Registers, Transmit ........................ 239
Auto-Wake-up on Sync Break .......................... 242
Receiver............................................................ 240
Setting up 9-bit Mode with
Address Detect ......................................... 240
Transmitter........................................................ 237
Baud Rate Generator (BRG) .................................... 233
Associated Registers........................................ 233
Auto-Baud Rate Detect..................................... 236
Baud Rate Error, Calculating............................ 233
Baud Rates, Asynchronous
Modes....................................................... 234
High Baud Rate Select
(BRGH Bit) ............................................... 233
Sampling .......................................................... 233
Serial Port Enable (SPEN Bit) .................................. 229
Synchronous Master Mode....................................... 244
Associated Registers,
Reception ................................................. 246
Associated Registers,
Transmit ................................................... 245
Reception ......................................................... 246
Transmission .................................................... 244
Synchronous Slave Mode......................................... 247
Associated Registers,
Receive .................................................... 248
Associated Registers,
Transmit ................................................... 247
Reception ......................................................... 248
Transmission .................................................... 247
USART Synchronous Receive
Requirements ........................................................... 445
USART Synchronous Transmission
Requirements ........................................................... 445
V
Voltage Reference Specifications..................................... 423
W
Wake-up from Sleep ................................................. 345, 357
Using Interrupts ........................................................ 357
Watchdog Timer (WDT)............................................ 345, 355
Associated Registers................................................ 356
Control Register........................................................ 355
Postscaler......................................................... 355, 356
Programming Considerations ................................... 355
RC Oscillator ............................................................ 355
Time-out Period ........................................................ 355
WCOL ............................................................................... 217
WCOL Status Flag.................................... 217, 218, 219, 222
WWW, On-Line Support ....................................................... 7
X
XORLW ............................................................................ 405
XORWF ............................................................................ 406
 2004 Microchip Technology Inc.
DS30491C-page 485