PXB4330 Datasheet, PDF (94/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
CoreSel
Selects the ABM core for TCT table access:
0
Upstream core selected (core 0)
1
Downstream core selected (core 1)
TrafClass(3:0)
Selects The Traffic Class for the TCT table access in the range
(0..15).
DwordSel(1:0)
Selects The 32-Bit Word of the 128-bit TCT table entry for access:
00
Bit field (31..0) of traffic class entry is selected.
01
Bit field (63..32) of traffic class entry is selected.
10
Bit field (95..64) of traffic class entry is selected.
11
Bit field (127..96) of traffic class entry is selected.
The meaning of registers TCT0 and TCT1 depends on the dword selection bit field
’DwordSel(1:0)’ in the WAR, because 128-bit TCT entries are mapped to 32 bits of
registers TCT0/TCT1 by this selection:
31
24 23
16 15
87
0
DiscardedCells(15:0)¹⁾
LostCells LostCells DiscardedPackets/
3
TrafClass Scheduler CLP1Cells(7:0)¹⁾
(3:0)¹⁾ (3:0)¹⁾
2 Accepted/Transmitted Packets(15:0)¹⁾
TrafClassOcc(15:0)
1 TrafClassMax(7:0) SbMaxEpdCi(7:0) QueueMaxEPD(7:0) QueueCiCLP1(7:0)
0
2827262524
BufNrtMax(7:0) BufNrtEPD(7:0)
TCT1(15:0)
TCT0(15:0)
1) _{All 5 statistical counters stop at maximum value. Automatically reset after Read access, that is, it is not}
necessary to Write them to 0.
Data Sheet
6-94
09.99