PXB4330 Datasheet, PDF (138/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
Note: Read access to bit-field IntRate(13:0) is not supported and will return undefined
values.
The following formulars explain how the two parameters IntRate and FracRate deter-
mine the scheduler output rate R via an auxiliary parameter T:
T=
------^S----^Y-----^S----^C-----^L----^K--------
32 cells^–1 × R
[without dimension]
with
• ABM core clock, [SYSCLK} = 1/s
• Scheduler output rate, [R] = cells/s
IntRate = int(T)
with
• int(T) is integer part of T
FracRate = {T – int(T)} × 256 + 1
Thus IntRate and FracRate can be calculated for a given scheduler output rate R.
Register SADRx.WSel = 1:
Bit
15
14
13
12
11
10
9
8
Init(10:3)
Bit
7
6
5
4
3
2
1
0
Init(2:0)
UtopiaPort(4:0)
Init(10:0)
Initialization Value
It is recommended to Write this bit-field to all zeroes during
Scheduler configuration/initialization (see note below for further
details).
Data Sheet
6-138
09.99