PXB4330 Datasheet, PDF (49/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Operational Description
4
Operational Description
This section describes the ABM from the microprocessor point of view.
4.1
Initialization and Test
These actions are to be performed after reset to prepare the ABM chip for operation.
• Check register Reset salues
• Initialize SDRAM
• Reset internal tables (RAMs)
• Set hardware configuration (UTOPIA configuration)
• Initialize traffic class tables
• Check data path (via adjacent ATM devices)
ABM diagnostic possibilities:
• Check all internal RAMs and register values
4.2
Global Configuration
• Set MODE register
(Uni-directional Mode or Bi-directional Mode)
• Configure UTOPIA interfaces: mode, number of PHYs
• Set empty rate generator (for SDRAM refresh)
• Set parameter MaxBurstS(3:0), page 6-140 of the output Multiplexer (Figure 3-1) and
the parameter CDVMAX(8:0), page 6-120 of the Peak Rate Limiter (Figure 3-1)
• Set global thresholds
• Programming of Scheduler output rates
• Assignment of Schedulers to PHYs at switch egress side
• Assignment of Schedulers to switch outputs at ingress side
4.3
Connection Setup
To set up a connection, the complete linked list must be established:
LCI → Queue ID → Scheduler and
LCI → Queue ID → Traffic Class
(see Figure 4-1). Additionally, the bandwidth and buffer space reservations must be per-
formed (see below). Depending on the traffic class, special functions must be enabled;
for example: ABR feedback enable or EPD/PPD for UBR.
Data Sheet
4-49
09.99