PXB4330 Datasheet, PDF (120/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
Register 29 CDVU/CDVD
Upstream/Downstream Rate Shaper CDV Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
CDVU
52_H
Written by CPU
CDVD
72_H
Bit
15
14
13
12
11
10
9
Unused(6:0)
Bit
7
6
5
4
3
2
1
CDVMax(7:0)
8
CDV
Max(8)
0
CDVMax(8:0)
Maximal Cell Delay Variation (without notice)
This bit-field determines a maximum CDV value for peak rate
limited queues that can be introduced without notice.
The CDVMax is measured in multiples of 16-cell cycles.
If this maximum CDV is exceeded, a CDVOV (see registers ISRU/
ISRD) interrupt is generated to indicate an unexpected CDV value.
This can occur if multiple peak rate limited queues are scheduled to
emit a cell in the same Scheduler time slot.
No cells are discarded due to this event.
Data Sheet
6-120
09.99