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PXB4330 Datasheet, PDF (102/201 Pages) Infineon Technologies AG – ICs for Communications
PXB 4330
Register Descriptions
Internal Table 3: Queue Configuration Table Transfer Registers QCT0..3
Queue Configuration Table Transfer Registers are used to access the internal Queue
Configuration Table (QCT) containing 2*1024 entries. The lower 1K entries control the
upstream core queues and the upper 1K entries control the downstream core queues.
Table 6-7 shows an overview of the registers involved.
Table 6-7 Registers for Queue Configuration Table Access
63
0
QCT RAM entry
RAM select:
15
0 15
0 15
0 15
0
15
0
QCT3
QCT2
QCT1
QCT0
MAR=02H
Queue select:
15
0 15
0 15
0 15
0
15
0
MASK3
=FFFFH
MASK2
=FFFFH
MASK1
MASK0
=FFFFH
WAR (0..2047D)
QCT0...QCT3 are the transfer registers for one 64 bit QCT table entry. The core
selection and queue number representing the table entry which needs to be Read or
modified must be written to the Word Address Register (WAR). The dedicated QCT table
entry is Read into the QCT0..QCT3 registers or modified by the QCT0..QCT3 register
values with a Read-Modify-Write mechanism. The associated Mask Registers
MASK0..MASK3 allow a bit-by-bit selection between Read (1) and Write (0) operation.
In case of Read operation, the dedicated QCT0..QCT3 register bit will be overwritten by
the respective QCT table entry bit value. In case of Write operation, the dedicated
QCT0..QCT3 register bit will modify the respective QCT table entry bit value.
Note: It is recommended not to Write to bit fields (64:32) and (15:0) of the QCT table
entries; that is, registers MASK0, MASK2 and MASK3 should always be
programmed with FFFFH.
The 10 LSBs (= Bit 9..0) of the WAR register select the queue-specific entry that will be
accessed and bit ’CoreSel’ of the ABM core.
The Read-Modify-Write process is controlled by the Memory Address Register (MAR).
The 5 LSBs (= Bit 4..0) of the MAR select the memory/table that will be accessed; to
select the QCT table, bit field MAR(4:0) must be set to 2. Bit 5 of MAR starts the transfer
and is automatically cleared after execution of the Read-Modify-Write process.
Data Sheet
6-102
09.99