PXB4330 Datasheet, PDF (92/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register 11 LCI1
LCI Transfer Register 1
Register Descriptions
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
LCI1
31_H
Written and Read by CPU to maintain the LCI table
Bit
15
14
13
12
11
10
9
8
Unused(2:0)
UpQID(9:5)
Bit
7
6
5
4
3
2
1
0
UpQID(4:0)
flags(2:0)
UpQID(9:0)
Upstream Queue Identifier.
Specifies the queue in which the cells of the connection are stored.
flag 2
Last cell of packet flag for upstream direction;
This bit is autonomously used by the EPD function of the ABM.
Initialize to 1 at connection setup.
Do not Write during normal operation.
flag 1
Discard packet flag in upstream direction;
This bit is autonomously used by the EPD function of the ABM.
Initialize to 0 at connection setup.
Do not Write during normal operation.
flag 0
Discard rest of packet flag in upstream direction;
This bit is autonomously used by the EPD function of the ABM.
Initialize to 0 at connection setup.
Do not Write during normal operation.
Data Sheet
6-92
09.99