PXB4330 Datasheet, PDF (106/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register 16 QCT2
Queue Configuration Transfer Register 2
Register Descriptions
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
QCT2
36_H
Not used by CPU
Bit
15
14
13
12
11
10
9
8
Reserved(15:8)
Bit
7
6
5
4
3
2
1
0
Reserved(15:8)
reserved(13:0) Do not Write in normal operation.
Register 17 QCT3
Queue Configuration Transfer Register 3
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
QCT3
37_H
Not used by CPU
Bit
15
14
13
12
11
10
9
8
Reserved(15:8)
Bit
7
6
5
4
3
2
1
0
Reserved(15:8)
reserved(13:0) Do not Write in normal operation.
Data Sheet
6-106
09.99