PXB4330 Datasheet, PDF (78/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
Table 6-1 ABM Registers Overview (cont’d)
Addr Register
(hex)
Description
94/B4 CRTQU/
CRTQD
Upstream/Downstream Common Real
Time Queue UTOPIA Port Select
Registers
Scheduler Enable Registers
98/B8 SCEN0U/
SCEN0D
Upstream/Downstream Scheduler
Enable 0 Registers
99/B9 SCEN1U/
SCEN1D
Upstream/Downstream Scheduler
Enable 1 Registers
9A/BA SCEN2U/
SCEN2D
Upstream/Downstream Scheduler
Enable 2 Registers
Interrupt Status/Mask Registers
D0 ISRU
Interrupt Status Register Upstream
D1 ISRD
Interrupt Status Register Downstream
D2 IMRU
Interrupt Mask Register Upstream
D3 IMRD
Interrupt Mask Register Downstream
RAM Select Registers
D7 MAR
Memory Address Register
D8 WAR
Word Address Register
UTOPIA FIFO Fill Level Register
D9 UTRXFILL
Upstream UTOPIA Receive FIFO Fill
Level Register
ABM Mode Register
DA MODE
ABM Mode Register
UTOPIA Configuration Registers
DC UTOPHY0
UTOPIA Configuration Register 0 (PHY
Side)
DD UTOPHY1
UTOPIA Configuration Register 1 (PHY
Side)
DE UTOPHY2
UTOPIA Configuration Register 2 (PHY
Side)
DF UTATM0
UTOPIA Configuration Register 0 (ATM
Side)
Reset µP ^See
value
pag
e
(hex)
0000 R/W 145
0000 R/W 146
0000 R/W 147
0000 R/W 148
0000 R/W 149
0000 R/W 152
0000 R/W 155
0000 R/W 156
0000 R/W 157
0000 R/W 159
0000 R 161
0000 R/W 162
0000 R/W 165
0000 R/W 166
0000 R/W 167
0000 R/W 168
Data Sheet
6-78
09.99