PXB4330 Datasheet, PDF (167/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
Register 56 UTOPHY2
UTOPIA Configuration Register 2 (PHY Side)
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
UTOPHY2 DE_H
Written and Read by CPU
Bit
15
14
13
12
11
10
9
8
Unused(7:0)
Bit
7
•
UTPortEnable
(23:16)
6
5
4
3
2
1
0
UTPortEnable(23..16)
UTOPIA Port Enable (PHY side):
Each bit enables or disables the respective UTOPIA port (23..16):
bit = 0 Port disabled.
bit = 1 Port enabled.
Data Sheet
6-167
09.99