PXB4330 Datasheet, PDF (142/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
ECIntRate(9:0)
Integer part of Empty Cycle Rate
The empty cycles are required by internal logic to perform the
refresh cycles of the SDRAMS.
Minimum value is 10_H and should be programmed during
configuration.
The following formulars explain how the two parameters ECIntRate and ECFracRate
determine the scheduler output rate R via an auxiliary parameter T:
T_max = -^S----^Y----^S-₃---₂-^C----_×^L----^K-_R----_e-^×---_f-^R-_r--_e--^e--_s--^f-_h-^r--^e-_C---^s--_y-^h--_c--^P--_l-_e-^e---_s-^r--ⁱ--^o----^d-
(8)
with:
• ABM core clock SYSCLK = [1/s]
• SDRAM RefreshPeriod = [s]
• SDRAM RefreshCycles requirement
ECIntRate = int(T)
with
• int(T) is integer part of T
ECFracRate = {T – int(T)} × 256 + 1
Thus ECIntRate and ECFracRate can be calculated for a given scheduler output rate
R.
Data Sheet
6-142
09.99