PXB4330 Datasheet, PDF (76/201 Pages) Infineon Technologies AG – ICs for Communications

PXB 4330
Register Descriptions
Table 6-1 ABM Registers Overview (cont’d)
Addr Register
(hex)
Description
Reset µP ^See
value
pag
e
(hex)
Queue Configuration Table Transfer Registers QCT0..3
34 QCT0
Queue Configuration Transfer Register 0 0000 R/W 103
35 QCT1
Queue Configuration Transfer Register 1 0000 R/W 104
36 QCT2
Queue Configuration Transfer Register 2 0000 R/W 106
37 QCT3
Queue Configuration Transfer Register 3 0000 R/W 106
Scheduler Occupancy Table Transfer Registers SOT0, SOT1
38 SOT0
SOT Transfer Register 0
0000 R/W 108
39 SOT1
SOT Transfer Register 1
0000 R/W 110
Mask Registers
for Read/Write transfer access control of LCI-, Traffic Class-, Queue Configuration- and
Scheduler Occupancy Tables
3B/3C MASK0/
MASK1
Table Access Mask Registers 0/1
0000 R/W 111
3D/3E MASK2/
MASK3
Table Access Mask Registers 2/3
0000 R/W 112
ABR CI/NI Marking Registers
41
CONFIG
Configuration Register
0000 R/W 113
Upstream Scheduler Level/Threshold Exceed Detection Indication Registers
45 LEVL0
Upstream Scheduler Lower Threshold 0000 R 114
Reached Indication Register 0
46 LEVL1
Upstream Scheduler Lower Threshold 0000 R 115
Reached Indication Register 1
47 LEVL2
Upstream Scheduler Lower Threshold 0000 R 116
Reached Indication Register 2
48 LEVH0
Upstream Scheduler High Threshold
Reached Indication Register 0
0000 R 117
49 LEVH1
Upstream Scheduler High Threshold
Reached Indication Register 1
0000 R 118
4A LEVH2
Upstream Scheduler High Threshold
Reached Indication Register 2
0000 R 119
Rate Shaper CDV Registers
Data Sheet
6-76
09.99