SDA55XX Datasheet, PDF (92/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Interrupts
7.7
Interrupt Vectors
When an interrupt is serviced, a long call instruction is executedto one of the locations
listed in the following table:
Interrupt Sources
Interrupt Enable
Register
Bit
Vector
Address
(hex)
Interrupt Request Flag
External Interrupt 0 IEN0
EX0
0003
IE0 (TCON.1)
Timer 0 Overflow
IEN0
ET0
000B
TF0 (TCON.5)
External Interrupt 1 IEN0
EX1
0013
IE1 (TCON.3)
Timer 1 Overflow
IEN0
ET1
001B
TF1 (TCON.7)
UART
IEN0
EU
0023
R1(SCON.0) and T1(SCON.1)
A to D
IEN0
EAD
002B
ADC(CISR0.6)
External Interrupt 6 IEN1
EX6
0033
Reserved
ExternalX Interrupt 0 IEN1
EXX0
003B
CISR1(IEX0)
Watchdog in timer
IEN1
EWT
0043
WTmr(CISR0.5)
External X Interrupt 1 IEN1
EXX1
004B
CISR1(IEX1)
Acquisition V-Sync
IEN1
EAV
0053
AVS(CISR0.4)
Display V-Sync
IEN1
EDV
005B
DVS(CISR0.3)
External Interrupt 12 IEN2
EX12
0063
Reserved
External Interrupt 13 IEN2
EX13
006B
Reserved
PWM in timer mode IEN2
EPW
0083
PWtmr(CISR0.2)
Channel Change
IEN2
ECC
008B
CC(CISR1.7)
Acquisition H-Sync
IEN2
EAH
0093
AHS(CISR0.1)
Display H-Sync
IEN2
EDH
009B
DHS(CISR0.0)
External Interrupt 18 IEN3
EX18
00A3
Reserved
External Interrupt 19 IEN3
EX19
00AB
Reserved
External Interrupt 20 IEN3
EX20
00B3
Reserved
External Interrupt 21 IEN3
EX21
00BB
Reserved
Line 24 Start
IEN3
E24
00C3
L24(CISR0.7)
A to D Wake up
IEN3
EADW
00CB
ADW(CISR1.6)
Semiconductor Group
92
User’s Manual July 99