SDA55XX Datasheet, PDF (107/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Memory Organization
10
Memory Organization
The processor has separate Program and Data memory space. Memory spaces can be further
classified as;
•Program Memory
•Internal Data Memory 256 Bytes (CPU RAM)
•Internal Extended Data Memory (XRAM)
A 16-bit program counter and a dedicated banking logic provide the processor with 1
MByte addressing capability (for ROM-less versions, up to 20 address lines are
available).
The program counter allows the user to execute calls and branches to any location within
the program memory space.
Data pointers allows to move data to and from Extended Data RAM.
There are no instructions that permit program execution to move from the program
memory space to any of the data memory space.
10.1
Program Memory
Program ROM consists of 128KByte on chip ROM.
Certain locations in program memory are reserved for specific programs. Locations
‘0000’ through ‘0002’ are reserved for the initialization program. Following reset, the
CPU always begins execution at location ‘0000’. Locations ‘0003’ through ‘00CB’ are
reserved for the interrupt-request service programs.
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User’s Manual July 99