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SDA55XX Datasheet, PDF (12/230 Pages) Infineon Technologies AG – Preliminary & Confidential
Preliminary & Confidential
SDA 55xx
Overview
1.5
Features
General
• Feature selection via special function register
• Simultaneous reception of TTX, VPS, PDC, and
WSS (line 23)
• Supply Voltage 2.5 and 3.3 V
• ROM version package P-SDIP 52, P-MQFP64
• Romless version package P-MQFP100,P-LCC84
External Crystal and Programmable clock speed
• Single external 6MHz crystal, all necessary clocks
are generated internally
• CPU clock speed selectable via special function
registers.
• Normal Mode 33.33 Mhz CPU clock, Power Save
mode 8.33 Mhz
P-SDIP-52
P-MQFP-64
Microcontroller Features
• 8bit 8051 instruction set compatible CPU.
• 33.33-MHz internal clock (max.)
• 0.360 µs (min.) instruction cycle
• Two 16-bit timers
• Watchdog timer
• Capture compare timer for infrared remote control decoding
• Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit)
• ADC (4 channels, 8 bit)
• UART
CMOS
Type
TVTEXT PRO (ROM)
TVTEXT PRO (ROMless)
Semiconductor Group
Package
P-SDIP-52, P-MQFP-64
P-MQFP-100, P-LCC-84
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User’s Manual July 99