SDA55XX Datasheet, PDF (61/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Microcontroller
6.1.1.5 Boolean Processor
The Boolean processor is an integral part of the processor architecture. It is an
independent bit processor with its own instruction set, its own accumulator (the carry
flag) and its own bit-addressable RAM and I/O. The bit manipulation instructions allow
the direct addressing of 128 bits within the internal data RAM and several bits within the
special function registers. The special function registers which have addresses exactly
divisible by eight contain directly addressable bits.
The Boolean processor can perform, on any addressable bit, the bit operations of ‘set’,
‘clear’, ‘complement’, ‘jump-if-set’, ‘jump-if-not-set’, ‘jump-if-set then-clear’ and ‘move to/
from carry’. Between any addressable bit (or its complement) and the carry flag it can
perform the bit operation of logical AND or logical OR with the result returned to the carry
flag.
6.1.1.6 Program Status Word Register (PSW)
The PSW flags record processor status information and control the operation of the
processor. The carry (CY), auxiliary carry (AC), two user flags (F0 and F1), register bank
select (RS0 and RS1), overflow (OV) and parity (P) flags reside in the program status
word register. These flags are bit-memory-mapped within the byte-memory-mapped
PSW. The CY, AC, and OV flags generally reflect the status of the latest arithmetic
operations. The CY flag is also the Boolean accumulator for bit operations. The P-flag
always reflects the parity of the A-register. F0 and F1 are general purpose flags which
are pushed onto the stack as part of a PSW save. The two register bank select bits (RS1
and RS0) determine which one of the four register banks is selected as follows:
7DEOH 
RS1
RS0
Register Bank
Register Location
0
0
0
0
1
1
1
0
2
1
1
3
00_H … 07_H
08_H … 0F_H
10_H … 17_H
18_H … 1F_H
Reset: 00_h Program Status Word
(MSB)
36:
CY
AC
F0
RS1
RS0
OV
SFR Address D0_H
(LSB)
F1
P
6.1.1.7 Stack Pointer (SP)
The 8-bit stack pointer contains the address at which the last byte was pushed onto the
stack. This is also the address of the next byte that will be popped. The SP is
Semiconductor Group
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User’s Manual July 99