SDA55XX Datasheet, PDF (114/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Memory Organization
Stack operation signals, SAdd[6:0], SDataI[7:0], SDataO[7:0], SRd and SWr have the same timing
as internal RAM signals.
10.3.7 Interfacing Extended memory
Signals A19, A18, A17, A16 are used to decode extended memory.
10.3.8 Interfacing Extended stack
Device provides 128 Byte extended Stack.
SAdd[6:0], SDataI[7:0], SDataO[7:0], SRd and SWr are available at the core boundary
which are sued to interface a 64 Byte SRAM.
10.3.9 Application Examples
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Semiconductor Group
114
User’s Manual July 99