SDA55XX Datasheet, PDF (39/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
5
Slicer and Acquisition
Slicer and Acquisition
5.1
General Function
TVTpro provides a full digital slicer including digital H- and V-sync separation and digital
sync processing. The acquisition interface is capable to process on all known data
services starting from line 6 to line 23 for TV (Teletext, VPS, CC, G+, WSS). Four
different framing codes (two of them programmable from field to field) are available for
each field. Digital signal processing algorithms are applied to compensate various
disturbance mechanisms. These are:
• Noise measurement and compensation.
• Attenuation measurement and compensation.
• Group delay measurement and compensation.
Note: Thus, TVTpro is optimized for precise data clock recovery and error free reception
of data widely unaffected from noise and the currently valid channel
characteristics.
The CVBS input contains an on-chip clamping circuit. The integrated A/D converter is a
7 bit video converter running at the internal frequency of 33.33 MHz.
The sliced data is synchronized to the clock frequency given by the clock-run-in and to
the framing code of the data stream, framing code checked and written to a
programmable VBI buffer. After line 23 is received an interrupt can be given to the
microcontroller. The microcontroller starts to process the data of this buffer. That means,
the data is error checked by software and stored in the memory.
To improve the signal quality the slicer control logic generates horizontal and vertical
windows in which the reception of the framing code is allowed. The framing code can be
programmed for each line individually, so that in each line a different service can be
received. For VPS and WSS the framing code is hardwired. All follow up acquisition
tasks are performed by the internal controller, so in principal the data of every data
service can be acquired.
5.2
Slicer Architecture
The slicer is composed of three main blocks:
• The slicer
• The H/V synchronization for the slicer
• The acquisition interface
Semiconductor Group
39
User’s Manual July 99