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SDA55XX Datasheet, PDF (13/230 Pages) Infineon Technologies AG – Preliminary & Confidential | |||
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SDA 55xx
Preliminary & Confidential
Overview
Memory
⢠Non-multiplexed 8-bit data and 16 ⦠20-bit address bus (ROMless Version)
⢠Memory banking up to 1Mbyte (Romless version)
⢠Up to 128 Kilobyte on Chip Program ROM
⢠Eight 16-bit data pointer registers (DPTR)
⢠256-bytes on-chip Processor Internal RAM (IRAM)
⢠128bytes extended stack memory.
⢠Display RAM and TXT/VPS/PDC/WSS-Acquisition-Buffer directly accessible via
MOVX
⢠UP to 16KByte on Chip Extended RAM(XRAM) consisting of;
- 1 Kilobyte on-chip ACQ-buffer-RAM (access via MOVX)
- 1 Kilobyte on-chip extended-RAM (XRAM, access via MOVX) for user software
- 3 Kilobyte Display Memory
Display Features
⢠ROM Character Set Supports all East and West European Languages in single device
⢠Mosaic Graphic Character Set
⢠Parallel Display Attributes
⢠Single/Double Width/Height of Characters
⢠Variable Flash Rate
⢠Programmable Screen Size (25 Rows x 33...64 Columns)
⢠Flexible Character Matrixes (HxV) 12 x 9...16
⢠Up to 256 Dynamical Redefinable Characters in standard mode; 1024 Dynamical
Redefinable Characters in Enhanced Mode
⢠CLUT with up to 4096 color combinations
⢠Up to 16 Colors per DRCS Character
⢠One out of Eight Colors for Foreground and Background Colors for 1-bit DRCS and
ROM Characters
⢠Shadowing
⢠Contrast Reduction
⢠Pixel by Pixel Shiftable Cursor With up to 4 Different Colors
⢠Support of Progressive Scan and 100 Hz.
⢠3 X 4Bits RGB-DACs On-Chip
⢠Free Programmable Pixel Clock from 10 MHZ to 32MHz
⢠Pixel Clock Independent from CPU Clock
⢠Multinorm H/V-Display Synchronization in Master or Slave Mode
Semiconductor Group
13
Userâs Manual July 99
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