SDA55XX Datasheet, PDF (145/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Watchdog Timer
15.8
WDT as general purpose timer.
WDT counter can be used as a general purpose timer in timer mode and the associated
load register can be used either as load register or independent scratch register for the
programmer.This is achieved by setting WDT_Tmr bit.
WDT_Tmr bit can only be set before starting the WDT timer. Once watchdog timer is
started it is not possible to switch to general purpose timer mode.
If WDT_Tmr bit is set then timer can be started using WTmr_Strt bit. When timer is
started it;
a) Resets the WTmr_OV overflow flag.
b) Loads the preload value from WDT_Rel and starts counting up.
Upon overflow WDT_Rst bit is not set neither is internal watchdog reset initiated.
Overflow is indicated by the bit WTmr_Ov(r/w). Overflow also sets the interrupt source
bit CISR0(WTmr). Both of these bits are set by hardware and must be cleared by
software. If corresponding watchdog timer interrupt enable IE1(EWT) bit is set then upon
overflow interrupt is initiated.
After overflow timer starts to count from WDT_Rel. It is possible for the processor to stop
the timer by resetting the WTmr_strt bit any time.
While timer is running, WDT_Tmr bit cannot be toggled any write to this bit is ignored.
To reset the WDT_Tmr bit, either timer is stopped (WTmr_Strt ) . However it is possible
to stop the timer (WTmr_Strt) and toggle (WDT_Tmr)with the same instruction.
Semiconductor Group
145
User’s Manual July 99