SDA55XX Datasheet, PDF (63/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Microcontroller
6.1.2 CPU Timing
Timing generation is completely self-contained, except for the frequency reference
which can be a crystal or external clock source. The on-board oscillator is a parallel anti-
resonant circuit. The XTAL2 pin is the output of a high-gain amplifier, while XTAL1 is its
input. A crystal connected between XTAL1 and XTAL2 provides the feedback and phase
shift required for oscillation.
In slowdown mode, processor runs at one fourth the normal frequency. This mode is
useful when power consumption needs to be reduced. Slow down mode is entered by
setting the bit SD in PCON register.
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6.1.3 Addressing Modes
There are five general addressing modes operating on bytes. One of these five
addressing modes, however, operates on both bytes and bits:
• Register
• Direct (both bytes and bits)
• Register-indirect
• Immediate
• Base register plus index-register indirect
The following table summarizes, which memory spaces may be accessed by each of the
addressing modes:
Register Addressing
R0 … R7
ACC, B, CY (bit), DPTR
Direct Addressing
RAM (low part)
Special Function Registers
Register-indirect Addressing
RAM (@R1, @R0, SP)
Semiconductor Group
63
User’s Manual July 99