SDA55XX Datasheet, PDF (49/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Default after reset: 00_H
(MSB)
FC3(7) FC3(6) FC3(5)
$&4)3
FC3(4) FC3(3)
Slicer and Acquisition
FC3(2)
FC3(1)
(LSB)
FC3(0)
FC3(7..0):
)UDPLQJ FRGH  /RZ %\WH
Bit 0: Last received bit of FC.
Default after reset: 00_H
(MSB)
$&4)3
(LSB)
FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK
(15)
(14)
(13)
(12)
(11)
(10)
(9)
(8)
FC3MASK(15..8) 0DVN IRU )UDPLQJ FRGH  +LJK %\WH
Bit 15: Mask for first received bit of FC.
Default after reset: 00_H
(MSB)
$&4)3
(LSB)
FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK FC3MASK
(7)
(6)
(5)
(4)
(3)
(2)
(1)
(0)
FC3MASK(7..0): 0DVN IRU )UDPLQJ FRGH  /RZ %\WH
Bit 0: Mask for last received bit of FC.
Semiconductor Group
49
User’s Manual July 99