SDA55XX Datasheet, PDF (128/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Capture reload timer
If Capture value is less then or equal to min_cap value or OV bit has been set, that is
spike has been detected and Interrupt is suppreessed. OV bit would be reset counter
would be reloaded with reload value (regarless of REL bit).
In this case If either RISE or FALL bit were set then counter will wait for the second event
(FIRST =1), if RISE and FALL both were set then counter will wait for the FIrst event
(FIRST =0).
13.3.11 CRT Interrupt.
CRT can generate interupt when SSU is employed.
CRT unit uses the same interrupt line as INT1 and INT0. The interrupt line is selected by
the SEL bit.
Note that when using CRT to generate interrupt, the direct interrupt source from Port 3.2
or 3.3 (which ever is selected) should be switched to CRT (CSCR1(IntSrc0),
CSCR1(IntSrc1) ). If application uses port pins directly to generate interrupt, then these
bits should be reset. Note that by default INT1 and INT0 are mapped to P3.3 and P3.2.
SSU generates interrupt signal as a pulse, which is captured in the int source register
TCON (IE1 or IE0). While using this mode TCON( IT0 or IT1) must be set to 1 (edge
triggered) and PCON(EX1R or EX0R) must be set to 1 and PCON(EX1F or EX0F) must
be set to 0.
For further information on interrupts please refer to the interrupt section of this document.
13.3.12 Counter Stop
Counter can be stopped any time by resetting the RUN bit. If counter is stopped and
started again(reset and set the RUN bit) , counter reloads with the RELOAD value and
reset the OV bit.
13.4
Idle and power down mode.
In idle mode CRT continues to function normally, unless it has been explicitly shut off by
PSAVEX (PERI) bit.
In power down mode CRT is shut off.
13.5
Registers
The RELL and RELH are the reload registers (SFR address B7H and B9H), CAPH and
CAPL are corresponding capture registers (SFR address BAH and BBH). MIN_CAPL
and MIN_CAPH(BC, BB) are Minimum capture registers. CRTCON0 (E5H) and
CRTCON1 are the control registers.
Semiconductor Group
128
User’s Manual July 99