SDA55XX Datasheet, PDF (68/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Microcontroller
6.3
Instruction Set
The assembly language uses the same instruction set and the same instruction opcodes
as the 8051 microcomputer family.
6.3.1 Notes on Data Addressing Modes
Rn – Working register R0 – R7.
direct– 128 internal RAM-locations, any I/O-port, control or status register.
@Ri– Indirect internal RAM-location addressed by register R0 or R1.
#data– 8-bit constant included in instruction.
#data 16–16-bit constant included as bytes 2 & 3 of instruction.
bit –
128 software flags, any I/O-pin, control or status bit in special function
registers.
Operations working on external data memory (MOVX …) are used to access the
extended internal data RAM (XRAM).
6.3.2 Notes on Program Addressing Modes
addr 16– Destination address for LCALL & LJMP may be anywhere within the program
memory address space.
addr 11– Destination address for ACALL & AJMP will be within the same 2 Kbyte of the
following instruction.
rel –
SJMP and all conditional jumps include an 8-bit offset byte. Range is + 127/ –
128 bytes relative to first byte of the following instruction.
Semiconductor Group
68
User’s Manual July 99