SDA55XX Datasheet, PDF (89/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Interrupts
DHS
1: Display horizental sync interrupt source bit set by hardware
Source bit must be reset by software after servicing the interupt.
0:Interrupt has not occurred.
Default after reset: 00_H
(MSB)
CC
ADW
&,65 ELW DGGUHVVHEOH
SFR Address C8_H
(LSB)
IEX1 IEX0
CC
ADW
IEX1
IEX0
1: Chanel change interrupt source bit set by hardware
Source bit must be reset by software after servicing the interupt.
0:Interrupt has not occurred.
1: ADC wake up interrupt source bit set by hardware
Source bit must be reset by software after servicing the interupt.
0:Interrupt has not occurred.
External Extra Interrupt 1 edge flag. Set by hardware when external
interrupt edge detected. Must be cleared by software. Note that port
P3.7 must be in input mode to use this interupt.
External Extra Interrupt 0 edge flag. Set by hardware when external
interrupt edge detected. Must be cleared by software.Note that port
P3.1 must be in input mode to use this interupt.
Semiconductor Group
89
User’s Manual July 99