SDA55XX Datasheet, PDF (46/230 Pages) Infineon Technologies AG – Preliminary & Confidential

SDA 55xx
Preliminary & Confidential
Slicer and Acquisition
5.5
Register Description
The acquisition interface has only two SFR Registers. The line and field parameters are
stored in the RAM (RAM Registers). They have to be initialized by software before
starting the acquisition.
Special Function Registers:
Default after reset: 00_H
(MSB)
ACQON reserved ACQSTA
6759%,
SFR-Address D9_H
(LSB)
VBIADR VBIADR VBIADR VBIADR
VBIADR:
ACQSTA
ACQON:
Defines the 4 MSB’s of the start address of the VBI buffer (the
LSB’s are fixed to ’0’ by hardware).
The VBI buffer location can be aligned to any 1 KByte memory
segment.
)LUVW )UDPLQJ FRGH DIWHU YHUWLFDO V\QF
0: No framing code after vertical sync has been detected
1: Framing code after vertical sync has been detected.
Note: The bit is set by hardware and cleared by software.
(QDEOH $FTXLVLWLRQ
0: The ACQ interface does not access memory (immediately
inactive)
1: The ACQ interface is active and writes data to memory
(switching on is synchronous to V)
Semiconductor Group
46
User’s Manual July 99