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HD6437020 Datasheet, PDF (492/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine | |||
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Tp
Tr
Tc1
Tc2
Tc1
Tc2
CK
A21âA0
RAS
CAS
RD(Read)
tAD
tAD
Row
tRASD1
Column
Column
tRDD
tCASD2
tCASD3
tRSD
tRASD2
tCASD3
WRH, WRL,
(Read)
AD15âAD0
DPH, DPL
(Read)
DACK0
DACK1
(Read)
tRAC2*3
tACC2*2 tCAC2*tR1DS tRDH*4
tDACD1
tDACD2 tDACD1
tRDH*5
tDACD2
RD(Write)
WRH, WRL,
(Write)
AD15âAD0
(Write)
DPH, DPL
(Write)
DACK0
DACK1
(Write)
tWSD1
tWSD2
tWSD1
tWSD2
tWDD1
tWPDD1
tWDH tWDD1
tWPDH tWPDD1
tWDH
tWPDH
tDACD3
tDACD3
tDACD3 tDACD3
Notes: 1.
2.
3.
4.
5.
For tCAC2, use tcyc à (n + 1) â 35 instead of tcyc à (n + 1) â tCASD2 â tRDS.
For tACC2, use tcyc à (n + 2) â 44 instead of tcyc à (n + 2) â tAD â tRDS.
For tRAC2, use tcyc à (n + 2.5) â 35 instead of tcyc à (n + 2.5) â tRASD1 â tRDS.
tRDH is measured from A21âA0 or CAS, whichever is negated first.
tRDH is measured from A21âA0, RAS, or CAS whichever is negated first.
Figure 19.27 DRAM Bus Cycle: (Long Pitch, High-Speed Page Mode)
HITACHI 484
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