HD6437020 Datasheet, PDF (287/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine

Phase counting mode
Select phase counting mode (1)
Select flag setting condition (2)
Start counting
(3)
Phase counting mode
Figure 10.42 Procedure for Selecting the Phase Counting Mode
Phase Counting Operation: Figure 10.43 shows an example of phase counting mode operation.
Table 10.16 lists the upcounting and downcounting conditions for TCNT2. The ITU counts on
both rise and fall edges of TCLKA and TCLKB. The phase differential and overlap of TCLKA
and TCLKB must be 1.5 cycles or more and the pulse width must be 2.5 cycles or more.
TCNT2 value
Increment
Decrement
TCLKB
TCLKA
TCNT2
Time
Figure 10.43 Phase Counting Mode Operation
Table 10.16 Up/Down Counting Conditions
Counting
Direction
TCLKB
TCLKA
Increment
Rising High
Low Rising
Falling Low
High Falling
Decrement
Rising High
High Falling
Falling
Low
Low
Rising
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