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HD6437020 Datasheet, PDF (212/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine
Table 9.6 Relationship of Request Modes and Bus Modes by DMA Transfer Category
Addres
s Mode Transfer Category
Request
Mode
Bus Transfer Usable
Mode Size (bits) Channels
Single External device with DACK and
External
B/C 8/16
0,1
external memory
Dual
External device with DACK and
memory-mapped external device
External memory and external
memory
External
B/C 8/16
Everything*1 B/C 8/16
0, 1
0–3*5
External memory and memory-
mapped external device
Everything*1 B/C 8/16
0–3*5
Memory-mapped external device and Everything*1 B/C 8/16
memory-mapped external device
0–3*5
External memory and on-chip
memory
Everything*1 B/C 8/16
0–3*5
External memory and on-chip
peripheral module
Everything*2 B/C*3 8/16*4
0–3*5
Memory-mapped external device and Everything*1 B/C 8/16
on-chip memory
0–3*5
Memory-mapped external device and Everything*2
on-chip peripheral module
On-chip memory and on-chip
memory
Everything*1
B/C*3 8/16*4
B/C 8/16
0–3*5
0–3*5
On-chip memory and on-chip
peripheral module
Everything*2 B/C*3 8/16*4
0–3*5
On-chip peripheral module and on-
chip peripheral module
Everything*2 B/C*3 8/16*4
0–3*5
B: Burst, C: Cycle steal
Notes: 1. External requests, auto requests and on-chip peripheral module requests are all
available. For on-chip peripheral module requests, however, SCI cannot be specified as
the transfer request source.
2. External requests, auto requests and on-chip peripheral module requests are all
available. When the SCI is also the transfer request source, however, the transfer
destination or transfer source must be the SCI respectively.
3. If the transfer request source is the SCI, cycle steal only.
4. The access size permitted when the transfer destination or source is an on-chip
peripheral module register.
5. If the transfer request is an external request, channels 0 and 1 only.
Bus Mode and Channel Priority Order: When a given channel (1) is transferring in burst mode
and there is a transfer request to a channel (2) with a higher priority, the transfer of the channel
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