HD6437020 Datasheet, PDF (486/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine

T₁
T₂
CK
A21–A0
HBS, LBS
CSn
RD (Read)
t_AD
t_CSD1
t_RDD
t_RDAC2*¹
t_CSD2
t_RSD
AD15–AD0
DPH, DPL
(Read)
DACK0
DACK1
(Read)
t_ACC2*²
t_DACD1
t_WSD1
t_RDS
t_RDH*³
t_WSD2
t_DACD2
WRH, WRL,
WR (Write)
t_WDD1
t_WDH
AD15–AD0
(Write)
DPH, DPL
(Write)
t_WPDD1
t_WPDH
t_DACD3
t_DACD3
DACK0
DACK1
(Write)
Notes: 1.
2.
3.
For t_RDAC2, use t_cyc × (n + 1.65) – 35 (for 35% duty) or t_cyc × (n + 1.5) – 35 (for
50% duty) instead of t_cyc × (n + 2) – t_RDD – t_RDS.
For t_ACC2, use t_cyc × (n + 2) – 44 instead of t_cyc × (n + 2) – t_AD (or t_CSD1) – t_RDS.
t_RDH is measured from A21–A0, CSn, or RD, whichever is negated first.
Figure 19.22 Basic Bus Cycle: Two-State Access
HITACHI 478