HD6437020 Datasheet, PDF (341/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine

Section 12 Watchdog Timer (WDT)
12.1 Overview
The SuperH microcomputer has a one-channel watchdog timer (WDT) for monitoring system
operations. If a system becomes uncontrolled and the timer counter overflows without being
rewritten correctly by the CPU, an overflow signal (WDTOVF) is output externally . The WDT
can simultaneously generate an internal reset signal for the entire chip.
When this watchdog function is not needed, the WDT can be used as an interval timer. In the
interval timer operation, an interval timer interrupt is generated at each counter overflow. The
WDT is also used in recovering from the standby mode.
12.1.1 Features
• Watchdog timer mode and interval timer mode can be selected.
• Outputs WDTOVF in the watchdog timer mode. When the counter overflows in the watchdog
timer mode, overflow signal WDTOVF is output externally. You can select whether or not to
reset the chip internally when this happens. Either the power-on reset or manual reset signal
can be selected as the internal reset signal.
• Generates interrupts in the interval timer mode. When the counter overflows, it generates an
interval timer interrupt.
• Used to clear the standby mode.
• Selection of eight counter clock sources
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