HD6437020 Datasheet, PDF (483/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine

Table 19.8 Bus Timing (3) (cont)
Conditions: V_CC = 3.0 to 5.5 V, V_SS = 0 V, φ = 12.5 MHz, Ta = –20 to +75°C*
*: Normal products. Ta = –40 to +85°C for wide-temperature range products.
Item
Wait setup time
Wait hold time
Read data access time 1^*4
Read data access time 2^*4
Symbol Min
t_WTS
t_WTH
t_ACC1
t_ACC2
40
10
t_cyc – 44
t_cyc × (n+2) – 44^*2
RAS delay time 1
t_RASD1
RAS delay time 2
t_RASD2
CAS delay time 1
t_CASD1
CAS delay time 2
t_CASD2
CAS delay time 3
t_CASD3
Column address setup time t_ASC
Read data
35% duty^*1 t_CAC1
access time from _{50% duty}
CAS 1*4
Read data access time from t_CAC2
CAS 2^*4
Read data access time from t_RAC1
RAS 1^*4
Read data access time from t_RAC2
RAS 2^*4
High-speed page mode CAS t_CP
precharge time
AH delay time 1
AH delay time 2
t_AHD1
t_AHD2
Multiplexed address delay
time
t_MAD
Multiplexed address hold
time
t_MAH
—
—
—
—
—
0
t_cyc × 0.65 – 35
t_cyc × 0.5 – 35
t_cyc × (n+1) – 35^*2
t_cyc × 1.5 – 35
t_cyc × (n+2.5) – 35^*2
t_cyc × 0.25
—
—
—
–10
Max
—
—
—
—
40
40
40
40
40
—
—
—
—
—
—
—
40
40
40
—
Unit Figures
ns 19.23, 19.28, 19.32
ns
ns 19.21, 19.24, 19.25
ns 19.22, 19.23, 19.26,
19.28
ns 19.24–19.27, 19.29–
ns ^19.31
ns 19.24
ns 19.26, 19.27, 19.29–
ns ^19.31
ns 19.24, 19.25
ns
ns
ns 19.26, 19.27, 19.28
ns 19.24, 19.25
ns 19.26, 19.27, 19.28
ns 19.25
ns 19.32
ns
ns
ns
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