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HD6437020 Datasheet, PDF (396/507 Pages) Hitachi Semiconductor – SuperH™ RISC engine
Figure 13.13 shows an example of SCI receive operation using a multiprocessor format.
Serial
data
Start
1 bit
0 D0
Stop Start
Data ID1 MPB bit bit
D1
D7 1 1 0 D0
Stop
Data 1 MPB bit
1
D1
D7 0 1 Idle (mark
state)
MPB
MPIE
RDRF
RDR
value
RXI request,
(multiprocessor
interrupt) MPIE = 0
RXI interrupt
handler reads data
in RDR and clears
RDRF to 0
ID1
Not own ID,
so MPIE is
set to 1 again
No RXI
interrupt,
RDR maintains
state
Figure 13.13 Example of SCI Receive Operation (own ID does not match data) (8-bit data
with multiprocessor bit and one stop bit)
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