TLK3132 Datasheet, PDF (88/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
www.ti.com
TLK3132
REFCLK Input
(MHz)
53.12500
53.12500
53.12500
53.12500
53.12500
106.25000
106.25000
106.25000
106.25000
106.25000
212.50000
212.50000
212.50000
212.50000
Table A-2. Reference Clock Selection – 1X/2X Fibre Channel Mode
Jitter Cleaner
Multiplier
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
Fibre Channel Mode - Legal Clocking Mode Settings
SERDES
REFCLK Input
(MHz)
SERDES PLL
Multiplier
Serial Data Rate = f(SPEED[1:0]) (Mbps)
Full (00)
Half (01)
Qrtr. (10)
53.12500
20
2125.000
1062.500
13.28125
26.56250
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
106.25000
10
2125.000
1062.500
26.56250
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
212.50000
5
2125.000
1062.500
212.50000
5
2125.000
1062.500
53.12500
20
2125.000
1062.500
106.25000
10
2125.000
1062.500
212.50000
5
2125.000
1062.500
TLK3132
REFCLK Input
(MHz)
76.80000
76.80000
76.80000
76.80000
76.80000
153.60000
153.60000
153.60000
153.60000
153.60000
307.20000
307.20000
307.20000
307.20000
307.20000
Table A-3. Reference Clock Selection – OBSAI Mode
Jitter Cleaner
Multiplier
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
OFF
0.25
0.5
1
2
Gigabit Ethernet Mode - Legal Clocking Mode Settings
SERDES
REFCLK Input
(MHz)
SERDES PLL
Multiplier
Serial Data Rate = f(SPEED[1:0]) (Mbps)
Full (00)
Half (01)
Qrtr. (10)
76.80000
20
3072.000
1536.000
768.000
19.20000
38.40000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
38.40000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
76.80000
20
3072.000
1536.000
768.000
153.60000
10
3072.000
1536.000
768.000
307.20000
5
3072.000
1536.000
768.000
614.40000
88
APPENDIX A – Frequency Ranges Supported
Submit Documentation Feedback