TLK3132 Datasheet, PDF (14/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
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TLK3132
PCS CORE
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Figure 2-4. Custom Independent Configuration Application
The TLK3132 supports the IEEE 802.3 defined Management Data Input/Output (MDIO) Interface to allow
ease in configuration and status monitoring of the link. The bi-directional data pin (MDIO) must be
externally pulled up to 1.2V or 2.5V (VDDM) per the standard for MDIO.
The TLK3132 supports the IEEE 1149.1/1149.6 defined JTAG test port for ease in board manufacturing
test. It also supports a comprehensive series of built-in tests for self-test purposes including PRBS
generation and verification, CRPAT, Mixed/High/Low Frequency testing.
The TLK3132 operates with a 1.2V core voltage supply, a 1.5/1.8V HSTL I/O voltage supply and a 2.5V
LVCMOS/bias supply.
The TLK3132 is packaged in a 15×15mm, 196-ball, 1mm ball pitch Plastic Ball Grid Array (PBGA)
package and is characterized for operation from –40°C to 85°C Ambient, 105°C Junction, and 5% power
supply variation at the balls of the device unless noted otherwise.
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Detailed Description
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