TLK3132 Datasheet, PDF (27/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

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2.7.10 NBID Mode (Nine Bit Interface DDR)
TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
DATA CHANNEL
NUMBER
Channel 0
Channel 1
Table 2-12. NBID – Lane To Functional Pin Mapping
TRANSMIT DATA 9 BITS
(INPUT)
{TXC_[0],TXD_[7:0]}
{TXC_[1],TXD_[15:8]}
RECEIVE DATA 9 BITS
(OUTPUT)
{RXC_[0],RXD_[7:0]}
{RXC_[1],RXD_[15:8]}
TRANSMIT CLOCK
(INPUT)
TXCLK_[0]
TXCLK_[1]
TXCLK_[0]
DDR Source Centered Timing
TXC_[0], TXD_[7:0]
Data0[8:0] = {Control
Bit, Data Byte}
Data1[8:0] = {Control
Bit, Data Byte}
RECEIVE CLOCK
(OUTPUT)
RXCLK_ [0]
RXCLK_ [1]
RXCLK_[0]
RXC_[0], RXD_[7:0]
Data0[8:0] = {Control
Bit, Data Byte}
Data1[8:0] = {Control
Bit, Data Byte}
TXCLK_[0]
TXC_[0], TXD_[7:0]
DDR Source Aligned Timing
Data0[8:0] = {Control
Bit, Data Byte}
Data1[8:0] = {Control
Bit, Data Byte}
RXCLK_[0]
RXC_[0], RXD_[7:0]
Data0[8:0] = {Control
Bit, Data Byte}
Data1[8:0] = {Control
Bit, Data Byte}
Figure 2-17. NBID – Individual Channel Byte Ordering – Channel 0 Example
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