TLK3132 Datasheet, PDF (26/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
2.7.9 TBID Mode (Ten Bit Interface DDR)
DATA CHANNEL
NUMBER
Channel 0
Channel 1
Table 2-11. TBID – Lane To Functional Pin Mapping
TRANSMIT DATA 10 BITS
(INPUT)
{TXC_[4], TXC_[0],TXD_[7:0]}
{TXC_[5],
TXC_[1],TXD_[15:8]}
RECEIVE DATA 10 BITS
(OUTPUT)
{RXC_[4], RXC_[0],RXD_[7:0]}
{RXC_[5],
RXC_[1],RXD_[15:8]}
TRANSMIT CLOCK
(INPUT)
TXCLK_[0]
TXCLK_[1]
TXCLK_[0]
TXC_[4], TXC_[0],
TXD_[7:0]
DDR Source Centered Timing
Data0[9:0]
Data1[9:0]
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RECEIVE CLOCK
(OUTPUT)
RXCLK_ [0]
RXCLK_ [1]
RXCLK_[0]
RXC_[4], RXC_[0],
RXD_[7:0]
TXCLK_[0]
TXC_[4], TXC_[0],
TXD_[7:0]
Data0[9:0]
Data1[9:0]
DDR Source Aligned Timing
Data0[9:0]
Data1[9:0]
RXCLK_[0]
RXC_[4], RXC_[0],
RXD_[7:0]
Data0[9:0]
Data1[9:0]
Figure 2-16. TBID – Individual Channel Byte Ordering – Channel 0 Example
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Detailed Description
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