TLK3132 Datasheet, PDF (17/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

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Parallel Data In
Parallel
to Serial
REFCLKP
/N
Multiplying
Clock
Synthesizer
Baud
Clock
TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
DQ
TDP
TDN
RCLK
Interpolator
& Clock
Recovery
Recovered
Clock
Serial to
Parallel
Parallel Data Out
&
Comma
RDP
Detect
RDN
Figure 2-7. Block Diagram of SERDES Core
2.6 Device Operation Modes
Table 2-2. Device Operation Modes
DEVICE MODE
MDIO Access Method
RGMII
(DDR)
GMII RTBI TBI
(SDR) (DDR) (SDR)
REBI
(DDR)
EBI
(SDR)
Clause 22⁽¹⁾
RNBI
NBI
TBID
(DDR) (SDR) (DDR)
NBID
(DDR)
DDR_SDR 17.5
1
0
1
0
1
0
1
0
X
NIBBLE_ORDER 17.4
0/1
X
0/1
X
0/1
X
0/1
X
TX_EDGE_MODE 17.1
0/1
RX_EDGE_MODE 17.0
FC_ENC_MODE 17.6
0
0/1
0
0/1
COMMA_DET_EN 17.7
0/1
0
1
0/1
1
PCS_EN 17.3 Logical OR w/CODE pin
1
0
ENC_DEC_EN 17.2
0
1
0
1
BUSWIDTH 36864.7
0
1
0
FULL_DDR 17.9
0
1
Legend : (X = Don’t Care) — (0 = Must Be Zero) — (1 = Must Be One) — (0/1 = Can Be Either Zero-or-One)
(1) All Clause 22 Registers are per device channel.
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Detailed Description
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