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TLK3132 Datasheet, PDF (66/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver
TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
www.ti.com
SIGNAL
TDP1/TDN1
TDP0/TDN0
RDP1/RDN1
RDP0/RDN0
LOCATION
P6
N7
M5
M4
M11
N11
N9
M9
Table 3-5. Serial Side Data/Clock Pins
VOLTAGE
AVDD
TYPE
CML Output
DESCRIPTION
Transmit Differential Pairs High speed serial outputs. The data rate
of these signals is from 600 Mbps minimum to 3.75 Gbps maximum.
AVDD
CML Input
Receive Differential Pairs, High speed serial inputs with on-chip 100
Ω differential termination. Each input pair is terminated differentially
across an on chip 100 Ω resistor. The data rate of these signals is
from 600 Mbps minimum to 3.75 Gbps maximum.
SIGNAL
VPP
TESTEN
AMUX1
AMUX0
RES[4:3,1]
GPI1
GPO[4:0]
LOCATION
C8
D8
P3
M10
N6
A10
D14
C5
N14
L1
H10
H12
H11
P2
VOLTAGE
DVDD
VDDO
N/A
N/A
N/A
VDDO
VDDO
Table 3-6. Miscellaneous Pins
TYPE
DESCRIPTION
P
Efuse Controller Voltage (1.2 V). Must be tied to 1.2 V (DVDD) in the
system application.
LVCMOS 2.5 V
Input
Test Mode Enable Input – Must Be Grounded in the System Application.
Analog Output
SERDES Analog Mux 1 RX – Must be Unconnected/Open in the System
Application
Analog Output
SERDES Analog Mux 0 TX – Must be Unconnected/Open in the System
Application
Resistive
Connection
HSTL Impedance Control Resistors – 0.5% Tolerance Resistor required of
the following values:
150 Ohms between RES4 and GND
150 Ohms between RES3 and GND
50 Ohms between RES1 and GND
Note: These resistors cannot be shared between output pins.
LVCMOS 2.5 V
Input
General Purpose Input – Must be Grounded in the System Application.
General Purpose Outputs – Must be Unconnected/Open in the System
Application.
LVCMOS 2.5 V
Output
It is recommended that these output ports go to headers or non-populated
resistor pads to facilitate probing of internal device functions/settings
during the initial system bring up process.
Also, to monitor PRBS testing real time, these outputs must be available
for probing on the application board.
66
Device Reset Requirements/Procedure
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