TLK3132 Datasheet, PDF (52/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
BIT(s)
37888.15
37888.14
37888.13:8
37888.7:5
37888.3
ADDRESS: 0x9400
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
Table 2-77. TX0_DLL_CONTROL
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15ns. Refer to Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
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ACCESS
RW
BIT(s)
37889.15
37889.14
37889.13:8
37889.7:5
37889.3
ADDRESS: 0x9401
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
Table 2-78. TX1_DLL_CONTROL
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15ns. Refer to Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
ACCESS
RW
BIT(s)
37892.15
37892.14
37892.13:8
37892.7:5
37892.3
ADDRESS: 0x9404
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
Table 2-79. RX0_DLL_CONTROL
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15 ns. Refer to Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
ACCESS
RW
BIT(s)
37893.15
37893.14
37893.13:8
37893.7:5
37893.3
ADDRESS: 0x9405
NAME
Lock_en
Write_en
Delay_sel[5:0]
Offset[2:0]
Filter_en
Table 2-80. RX1_DLL_CONTROL
DEFAULT: 0x0008
DESCRIPTION
For TI use only
For TI use only
DLL delay control. For TI use only
Phase shift control. Adds or removes delay element. Each delay element
is 0.15 ns. Refer to Table 2-81: DLL Offset Control
When asserted, the internal filter is used to reduce the cycle to cycle jitter
of the output clock.
ACCESS
RW
52
Detailed Description
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