TLK3132 Datasheet, PDF (48/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
Table 2-57. JC_TEST_CONTROL_1⁽¹⁾
ADDRESS: 0x9108
DEFAULT: 0x0000
BIT(s)
NAME
DESCRIPTION
37128.15:12 REFCK_DIV_TST[3:0]
Test bits for Reference divider
37128.11:8 FB_DIV_TST[3:0]
Test bits for Feedback divider
37128.7:4 TXRX_DIV_TST[3:0]
Test bits for TXRX output divider. Should be set to 4’b1010 when JC PLL is
used
37128.3:2 RXBCLK_DIV_TST[1:0] Test bits for RXBYTECLK divider
(1) This register value should be written 0x00A0 when JC PLL is used.
BIT(s)
37129.15:14
37129.13:12
37129.11:10
37129.9:8
37129.7:4
37129.3:0
Table 2-58. JC_TEST_CONTROL_2
ADDRESS: 0x9109
DEFAULT: 0x0000
NAME
DESCRIPTION
DEL_DIV_TST[1:0]
Test bits for Delay clock divider
HSTL_DIV_TST[1:0]
Test bits for HSTL VTP divider
HSTL_DIV2_TST[1:0] Test bits for HSTL VTP 2X divider
PFD_TST[1:0]
Test bits for Phase frequency detector
CP_TST[3:0]
Test bits for Charge pump
CP_BUF_TST[3:0]
Test bits for Charge pump Buffer
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ACCESS
RW
RW
RW
RW
ACCESS
RW
RW
RW
RW
RW
RW
BIT(s)
37200.15:8
37200.7:4
37200.3
37200.2
Table 2-59. JC_TI_TEST_CONTROL_1
ADDRESS: 0x9150
DEFAULT:0x0000
NAME
DESCRIPTION
CML_BIAS_TST[7:0]
Test bits for Bias generator for CML divider. For TI purposes only.
CML_BIAS_CTRL[3:0] Control bits for Bias generator for CML divider. For TI purposes only.
DIFFTX_ENTST
Enable for TX clock out from SERDES REFCLK MUX. For TI purposes only.
DIFFRX_ENTST
Enable for RX clock out from SERDES REFCLK MUX. For TI purposes only.
ACCESS
RW
RW
RW
RW
BIT(s)
37201.15:13
37201.12:10
Table 2-60. JC_TI_TEST_CONTROL_2
ADDRESS: 0x9151
NAME
VCO_FILCAP_CTRL[2:0]
ANA_MUX_CTRL[2:0]
DEFAULT: 0x0000
DESCRIPTION
Control bits for VCO tail current noise filter. For TI purposes only.
Control bits to select the tested signals. For TI purposes only.
ACCESS
RW
RW
BIT(s)
37202.9:0
ADDRESS: 0x9152
NAME
JC_TRIM[9:0]
Table 2-61. JC_TRIM_STATUS
DEFAULT: 0x0000
DESCRIPTION
Jitter Cleaner Resistor Trim value
ACCESS
RO
BIT(s)
37376.15:0
ADDRESS: 0x9200
NAME
Die ID [127:112]
Table 2-62. DIE_ID_7
DEFAULT: 0x0000
DESCRIPTION
Bits [127:112] of the Die ID. Unique TI DIE identifier.
ACCESS
RO
BIT(s)
37377.15:0
ADDRESS: 0x9201
NAME
Die ID [111:96]
Table 2-63. DIE_ID_6
DEFAULT: 0x0000
DESCRIPTION
Bits [111:96] of the Die ID. Unique TI DIE identifier.
ACCESS
RO
48
Detailed Description
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