TLK3132 Datasheet, PDF (33/103 Pages) Texas Instruments – 2-Channel Multi-Rate Transceiver

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TLK3132
2-Channel Multi-Rate Transceiver
SLLS956 – DECEMBER 2008
The following timing diagrams illustrate an example read transaction to read the contents of Register
16’h9000 using indirect addressing in Clause 22.
MDC
MDIO
0
1
0
1
PA [4:0]
5 'h1 E
1
0 16 'h9000
1
32 "1's"
Preamble
Start
Write
Code
PHY
Addr
REG
Addr
Turn
Around
Data
Idle
Figure 2-26. CL22 – Indirect Address Method – Address Write
MDC
MDIO
Pu1
0
1
1
0 ^{PA4 PA0}
5’h1F
0 D15 D0
1
32 "1's"
Turn
Read
PHY
REG
Around
Preamble
Start
Code
Addr
Addr
Data
Idle
(1) Note that the 1 in the Turn Around section is externally pulled up, and driven to Z by the TLK3132.
Figure 2-27. CL22 – Indirect Address Method – Data Read⁽¹⁾
The IEEE 802.3 Clause 22/45 specification defines many of the registers, and additional registers have
been implemented for expanded functionality.
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Detailed Description
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