HD6417751RBP240V Datasheet, PDF (834/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

17. Smart Card Interface
Port value ^{Width is}
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SCK
Width is
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CKE1 value
Specified
width
SCK
(a) When GM = 0
Specified
width
CKE1 value
(b) When GM = 1
Figure 17.6 Difference in Clock Output According to GM Bit Setting
17.3.6 Data Transfer Operations
Initialization: Before transmitting and receiving data, the smart card interface must be initialized
as described below. Initialization is also necessary when switching from transmit mode to receive
mode, or vice versa. Figure 17.7 shows a sample initialization processing flowchart.
1. Clear the TE and RE bits in the serial control register (SCSCR1) to 0.
2. Clear error flags FER/ERS, PER, and ORER in the serial status register (SCSSR1) to 0.
3. Set the GM bit, parity bit (O/E), and baud rate generator select bits (CKS1 and CKS0) in the
serial mode register (SCSMR1). Clear the CHR and MP bits to 0, and set the STOP and PE
bits to 1.
4. Set the SMIF, SDIR, and SINV bits in the smart card mode register (SCSCMR1).
When the SMIF bit is set to 1, the TxD pin and RxD pin both go to the high-impedance state.
5. Set the value corresponding to the bit rate in the bit rate register (SCBRR1).
6. Set the clock source select bits (CKE1 and CKE0) in SCSCR1. Clear the TIE, RIE, TE, RE,
MPIE, and TEIE bits to 0.
If the CKE0 bit is set to 1, the clock is output from the SCK pin.
7. Wait at least one bit interval, then set the TIE, RIE, TE, and RE bits in SCSCR1. Do not set the
TE bit and RE bit at the same time, except for self-diagnosis.
Rev.4.00 Oct. 10, 2008 Page 734 of 1122
REJ09B0370-0400