HD6417751RBP240V Datasheet, PDF (59/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Contents
Section 1 Overview ............................................................................................................. 1
1.1 SH7751/SH7751R Features .............................................................................................. 1
1.2 Block Diagram .................................................................................................................. 9
1.3 Pin Arrangement ............................................................................................................... 10
1.4 Pin Functions .................................................................................................................... 13
1.4.1 Pin Functions (256-Pin QFP)............................................................................... 13
1.4.2 Pin Functions (256-Pin BGA).............................................................................. 24
1.4.3 Pin Functions (292-Pin BGA).............................................................................. 35
Section 2 Programming Model........................................................................................ 47
2.1 Data Formats ..................................................................................................................... 47
2.2 Register Configuration ...................................................................................................... 48
2.2.1 Privileged Mode and Banks ................................................................................. 48
2.2.2 General Registers ................................................................................................. 51
2.2.3 Floating-Point Registers....................................................................................... 53
2.2.4 Control Registers ................................................................................................. 55
2.2.5 System Registers.................................................................................................. 56
2.3 Memory-Mapped Registers............................................................................................... 58
2.4 Data Format in Registers................................................................................................... 59
2.5 Data Formats in Memory .................................................................................................. 59
2.6 Processor States................................................................................................................. 60
2.7 Processor Modes ............................................................................................................... 62
Section 3 Memory Management Unit (MMU) ........................................................... 63
3.1 Overview........................................................................................................................... 63
3.1.1 Features................................................................................................................ 63
3.1.2 Role of the MMU................................................................................................. 63
3.1.3 Register Configuration......................................................................................... 66
3.1.4 Caution................................................................................................................. 66
3.2 Register Descriptions ........................................................................................................ 67
3.3 Address Space ................................................................................................................... 71
3.3.1 Physical Address Space ....................................................................................... 71
3.3.2 External Memory Space....................................................................................... 74
3.3.3 Virtual Address Space.......................................................................................... 75
3.3.4 On-Chip RAM Space........................................................................................... 76
3.3.5 Address Translation ............................................................................................. 76
3.3.6 Single Virtual Memory Mode and Multiple Virtual Memory Mode.................... 77
3.3.7 Address Space Identifier (ASID) ......................................................................... 77
Rev.4.00 Oct. 10, 2008 Page lvii of xcviii
REJ09B0370-0400