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| HD6417751RBP240V Datasheet, PDF (509/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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SH7751/SH7751R
A16
A0
CSn
RD
D7
D0
WE0
13. Bus State Controller (BSC)
128K Ã 8-bit
SRAM
A16
A0
CS
OE
I/O7
I/O0
WE
Figure 13.9 Example of 8-Bit Data Width SRAM Connection
Wait State Control: Wait state insertion on the SRAM interface can be controlled by the WCR2
settings. If the WCR2 wait specification bits corresponding to a particular area are not zero, a
software wait is inserted in accordance with that specification. For details, see section 13.2.6, Wait
Control Register 2 (WCR2).
The specified number of Tw cycles are inserted as wait cycles using the SRAM interface wait
timing shown in figure 13.10.
Rev.4.00 Oct. 10, 2008 Page 409 of 1122
REJ09B0370-0400
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