HD6417751RBP240V Datasheet, PDF (1023/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

22. PCI Controller (PCIC)
22.2.39 Port Control Register (PCIPCTR)
Bit: 31
30
29
28
—
—
—
—
Initial value:
0
0
0
0
PCI-R/W: —
—
—
—
PP Bus-R/W: R
R
R
R
Bit: 23
22
21
20
—
—
—
—
Initial value:
0
0
0
0
PCI-R/W: —
—
—
—
PP Bus-R/W: R
R
R
R
27
26
25
24
—
—
—
—
0
0
0
0
—
—
—
—
R
R
R
R
19
18
17
16
— PORT2EN PORT1EN PORT0EN
0
0
0
0
—
—
—
—
R
R/W
R/W
R/W
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
PCI-R/W: —
—
—
—
—
—
—
—
PP Bus-R/W: R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
PB2PUP PB2IO PB1PUP PB1IO PB0PUP PB0IO
Initial value:
0
0
0
0
0
0
0
0
PCI-R/W: —
—
—
—
—
—
—
—
PP Bus-R/W: R
R
R/W
R/W
R/W
R/W
R/W
R/W
The port control register (PCIPCTR) selects whether to enable or disable port function allocation
for pins for unwanted PCI bus arbitration when the PCIC is used in non-host mode. It also
specifies the swithing ON/OFF of pin pull-up resistances and between input and output. This 32-
bit read/write register can be accessed from the PP bus.
The PCIPCTR register is initialized to H'00000000 at a power-on reset. It is not initialized at a
software reset.
When the PCIC is operating as host, the port function cannot be used if the arbitration function is
enabled.
Rev.4.00 Oct. 10, 2008 Page 923 of 1122
REJ09B0370-0400