HD6417751RBP240V Datasheet, PDF (101/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 1 Overview
1. Overview
1.1 SH7751/SH7751R Group Features
The SH7751/SH7751R Group microprocessor, featuring a built-in PCI bus controller compatible
with PCs and multimedia devices. The SuperH™* RISC engine is a Renesas original 32-bit RISC
(Reduced Instruction Set Computer) microcomputer. The SuperH™ RISC engine employs a fixed-
length 16-bit instruction set, allowing an approximately 50% reduction in program size over a 32-
bit instruction set.
The SH7751/SH7751R Group feature the SH-4 Core, which at the object code level is upwardly
compatible with the SH-1, SH-2, and SH-3 microcomputers. The SH7751/SH7751R Group have
an instruction cache, an operand cache that can be switched between copy-back and write-through
modes, a 4-entry full-associative instruction TLB (table look aside buffer), and MMU (memory
management unit) with 64-entry full-associative shared TLB.
The SH7751/SH7751R Group also feature a bus state controller (BSC) that can be coupled to
DRAM (page/EDO) and synchronous DRAM. Also, because of its built-in functions, such as PCI
bus controller, timers, and serial communications functions, required for multimedia and OA
equipment, use of the SH7751/SH7751R Group enable a dramatic reduction in system costs.
The features of the SH7751/SH7751R Group are summarized in table 1.1.
Note: * SuperH is a trademark of Renesas Technology Corp.
Rev.4.00 Oct. 10, 2008 Page 1 of 1122
REJ09B0370-0400