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HD6417751RBP240V Datasheet, PDF (354/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
9. Power-Down Modes
9.8.3 Usage Notes
1. The CA pin level must be kept high when the RTC power supply is started (figure 9.15).
2. On the SH7751R, supply power to the VDD, VDDQ, V , DD-CPG V , DD−PLL1 and VDD-PLL2 power supply
pins in addition to the RTC power supply pin in hardware standby mode.
9.9 STATUS Pin Change Timing
The STATUS1 and STATUS0 pin change timing is shown below.
The meaning of the STATUS pin settings is as follows:
Reset:
Sleep:
Standby:
Normal:
HH (STATUS1 high, STATUS0 high)
HL (STATUS1 high, STATUS0 low)
LH (STATUS1 low, STATUS0 high)
LL (STATUS1 low, STATUS0 low)
The meaning of the clock units is as follows:
Bcyc: Bus clock cycle
Pcyc: Peripheral clock cycle
Rev.4.00 Oct. 10, 2008 Page 254 of 1122
REJ09B0370-0400