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HD6417751RBP240V Datasheet, PDF (586/1226 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
13. Bus State Controller (BSC)
CKIO
A25–A0
CSn
RD/WR
RD
D31–D0
(read)
WEn
T1
T2
BS
RDY
DACKn
(SA: IO ← memory)
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.65 Byte Control SRAM Basic Read Cycle (No Wait)
Rev.4.00 Oct. 10, 2008 Page 486 of 1122
REJ09B0370-0400